1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device and a method for fabricating the same, in which thicknesses of a gate insulating film at edge portions of a gate electrode are formed thicker for improving electric characteristics of the device.
2. Background of the Related Art
Ceaseless researches for reducing sizes of transistors in semiconductor integrated circuits are underway for obtaining semiconductor integrated circuits that have excellent performances but highly integrated. As results of these efforts, semiconductors are scaled down to a submicron level. The reduction of a semiconductor device size should be in a horizontal dimension as well as in a vertical dimension proportional to the reduction of the horizontal dimension, for balancing various device characteristics. That is, if a size of device is reduced, for example, if a distance between a source and a drain of a transistor comes closer, undesired device characteristic changes are occurred, of which typical one is the short channel effect. For solving the short channel effect, a horizontal dimension(a gate length) as well as a vertical dimension(a thickness, a junction depth and so on of a gate insulating film) should be reduced, with subsequent lowering of applied voltage, increase of doping concentration and, particularly, adjustment of a doping profile of a channel region. However, since the semiconductor device should satisfy an operating power requirement for a particular electronic appliance to which the device is applied, the semiconductor device, particularly, NMOS transistor becomes to have a structure vulnerable to hot carrier occurred by a sudden acceleration of electrons applied from a source in a strong electric field near a drain due to the short channel effect caused by a reduced distance between the source and the drain, because the operating power requirement of the electronic appliance to which semiconductor device is applied has not yet been reduced though the semiconductor size has been reduced. This hot carrier is caused by a short channel and a very strong electric field coming from a high applied voltage in an approximation of a drain junction.
A background method for fabricating a semiconductor device will be explained referring to the attached drawings. FIGS. 1A.about.1D illustrate sections for explaining the steps of the background art method for fabricating a semiconductor device.
Referring to FIG. 1A, a gate insulating film 12 is formed on an active region of a semiconductor substrate 11 having field oxide films(not shown) formed selectively thereon. A gate electrode polysilicon layer 13 and a cap insulating film 14 are formed in succession on the gate insulating film 12. Then, as shown in FIG. 1B, a photoresist film(not shown) is coated on the cap insulating film 14 and subjected to patterning by exposure and development, which is then used in a successive etching of the cap insulating film 14 and the polysilicon layer 13 to a gate electrode 13a. As shown in FIG. 1C, impurity ions are injected into surfaces of the substrate 11 on both sides of the gate electrodes 13a using the gate electrode 13a as a mask, to form LDD(Lightly Doped Drain) regions 15 therein. Then, an insulating layer is formed on an entire surface of the semiconductor substrate 11 including the gate electrode 13a and etched back, to form insulating sidewalls 16 at both sides of the gate electrode 13a as shown in FIG. 1D. Thereafter, impurity ions are injected using the insulating sidewalls 16 and the gate electrode 13a as masks, to form source and drain impurity regions 17 and 17a.
However, the aforementioned method for fabricating a semiconductor device has a problem in that the reduction of a channel length as the device integration advances result in a hot carrier effect by the gate electrode near the drain, that degrades device electric characteristics.